Tag Archives: Hardware

My Internal IRQ is Broken

Interrupt ReQuest (IRQ) is an hardware interrupt on a PC. There are 16 IRQ lines used to signal the CPU that a peripheral event has started or terminated. Except for PCI devices, two devices cannot use the same line. If a new expansion card is preset to the IRQ used by an existing board, one of them must be changed. This was an enormous headache in earlier machines.

Starting with the Intel 286 CPU in 1982, two 8259A controller chips were cascaded together and bumped the IRQs from 8 to 16. However, IRQ 2 is lost because it is used to connect to the second chip. IRQ 9 may be available for general use as most VGA cards do not require an IRQ.

PCI to the Rescue
The PCI bus solved the limited IRQ problem, as it allowed IRQs to be shared. For example, if there were only one IRQ left after ISA devices were assigned their required IRQs, all PCI devices could share it.

Mobile Devices, Larger RAM, Multi-level caches, and Multi-core chips

As with everyone else on the market creating these devices, it occurs to me that as mobile devices contain more and more memory, e.g. 1 GB RAM on the Samsung Galaxy S III and Apple iPhone 5 as well as adding CPU cores, especially with touchscreen keys  and gestures, as well as ‘core or bundled applications’, it IS increasingly important to manage memory in mobile systems the way desktop or server systems manage memory. See Multi-level cache and Multi-core chips in the Wikipedia article CPU cache as two levels of complexity in working with expanding CPU and RAM sets.  A person is already able to create delays in touch typing in these cool new devices as they have several to many applications running in parallel processing data. Beyond expanding the capacity of these devices, CPU and memory management has to be a key factor in maintaining the stability of these devices. Maybe this is already implement although not transparent in the specifications I have seen.  Although at present, not as important, or glitzy in marketing literature to sell more devices, or currently negligible to the non-power user, it will become increasing transparent.  At this stage, we are just ‘throwing bodies’ at the problem, i.e. adding more CPU and Memory capacity.